Nikos Bellas is a Professor at the ECE Department of the University of Thessaly in Volos, Greece. His
research interests include reconfigurable and accelerator-based computing, embedded systems, and design
for low power. He received the Diploma from the Computer Engineering and Informatics Department of
the University of Patras, Greece, and the M.Sc. and Ph.D. degrees in Electrical and Computer Engineering
from the University of Illinois, Urbana-Champaign. Before joining the University of Thessaly, he was a
principal staff engineer at Motorola Labs in Chicago. He was one of the architects of MPEG4 video
decoding chips used by the first Motorola camera phone and has worked extensively on architecting
systems on chip for multimedia and imaging applications. He holds 10 issued US patents.
The present and future of computing: Domain-Specific Accelerators
The end of Dennard scaling and the slow-down of Moore’s law have stopped major
improvements in the performance and energy efficiency of general-purpose microprocessors. Since the
energy budget is always limited, the semiconductor industry has sought higher performance by lowering
energy per operation, thus, pushing the emergence of accelerator-based (or domain-specific) computing. In
fact, hardware accelerators such as GPUs, FPGAs, and ASICs have driven the ML/AI revolution in the last
In this talk, we will briefly examine the forces behind the need for domain-specific computing and how
arithmetic and memory specialization can achieve orders of magnitude better performance and energy
efficiency than general-purpose computing. We will describe some of the latest computing architectures for
Machine Learning and their characteristics. We will then move on to reconfigurable hardware (FPGAs) and
High-Level Synthesis (HLS) concepts as enablers for domain-specific accelerators focusing on applications
for real-time visual robotics.
Take me back to speakers!