George Keramidas
Dr. Georgios Keramidas received his PhD from the Department of Electrical Engineering and Computer Technology of the University of Patras in 2008. Since 2019, he is an Assistant Professor at the Department of Informatics of the Aristotle University of Thessaloniki. He teaches the undergraduate courses: Computer Architecture, Digital Design, Advanced Topics in Architecture and Microprocessors, as well as the graduate course: Edge Computing. Prior to his appointment as a faculty member, he worked for almost 11 years in industry as the Chief Scientific Officer of Think Silicon S.A. in which he participated in the design of the architecture of the company's multi-core GPUs. He was also responsible for managing funded projects and for managing the company's patent portfolio. Mr. Keramidas continues to work for the company as a technology and innovation consultant focusing on new product design as well as expanding the patent portfolio. He has participated in more than 10 collaborative research projects funded by the European Union and in 5 national projects, either as main coordinator, as technical coordinator, or as principal investigator. He is currently in charge of a privately funded project and leads a team of 4 PhD candidates and 10 graduate/postgraduate students. He is also technical coordinator of a technology transfer project between industry and universities (SMART4ALL) funded by the European Commission. His research interests include design and modeling of low-power processors and memory systems, multi-core and multi-threaded processor design, graphics accelerators, artificial intelligence accelerators, system prototyping on FPGAs, and compiler-level code optimization techniques. He has co-published 110+ scientific papers in international conferences and journals, three book chapters and holds 14 patents (an additional 12+ patents are under evaluation). His work has received over 1400++ citations (h-index: 17, i10-index: 28). He has received a best paper award, a Technology Transfer award (from HiPEAC) and an “Outstanding reviewer” award from the journal Microprocessors and Microsystems (MICPRO). Mr. Keramidas has been co-chairman of 4 international conferences (FPL'21, ISVLSI'21, ARC 2018, ARC 2023) and is a regular member of the Technical Committee of several conferences (DATE, FPL, ISVLSI, SAMOS, CITS, CCCI, ISQED). He is a regular expert and innovation consultant in the European Union in EIC (European Innovation Council) programs, a regular evaluator in magazines related to his subject, a member of the European Network of Excellence HiPEAC and a member of the Technical Chamber of Greece (TEE).
Ultra-Low Power Accelerators for the Edge
First, the basic principles of power consumption of CMOS circuits for devices operating in the cloud (cloud) and at the edge of the network (edge) will be presented. Next, we'll focus on accelerator design principles and analyze various low-power techniques that follow a Hardware (HW), Software (SW), and Compiler co-design approach to run high-performance, low-power applications at the Edge . Emphasis will be placed on the compression and parallelization of TinyML implementations.
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